See Also

In the following example, reg[].clrn is given a default value of VCC:

SUBDESIGN 5bcount
(
	d[5..1]      : INPUT;
	clk          : INPUT;
	clr          : INPUT;
	sys_reset    : INPUT;
	enable       : INPUT;
	load         : INPUT;
	q[5..1]      : OUTPUT;
)

VARIABLE
	reg[5..1]    : DFF;

BEGIN
	DEFAULTS
		reg[].clrn = VCC;
	END DEFAULTS;

	reg[].clk = clk;
	q[]       = reg[];

	IF sys_reset # clr THEN
		reg[].clrn = GND;
	END IF;

	!reg[].prn  = (load & d[]) & !clr;
	!reg[].clrn = load & !d[];

	reg[] = reg[] + (0, enable);
END;

Back to Top