FreeCore Function #7:
Gray Code
Counter
Module name: gray
Current release: version 1.0, April 24, 1997
Contributed by: Woody Johnson woodyj@dacmail.net
Shown below is a sample schematic using the gray module with a WIDTH of 3:
...and this is how the simulator output of the above schematic looks like:
The gray module implements a parameterized width gray code sequence counter. Gray code count sequences are distinguished by the fact that only one bit changes as the counter goes through it's sequence. This is advantagous when using the output of the count sequence asynchronously. Since only one bit at a time will change, the outputs can be decoded without introducing logic hazards.
Here are some logic cell (LC) usage and registered frequency (F) for various implementations of gray:
| LC/F | NORMAL | FAST |
| MAX7K-15 | 9/77 MHz | 9/77 MHz |
| FLEX8K-4 | 15/53 MHz | 10/73 MHz |
| FLEX10K-4 | 15/84 MHz | 16/88 MHz |
| LC/F | NORMAL | FAST |
| MAX7K-15 | 17/77 MHz | 17/77 MHz |
| FLEX8K-4 | 31/29 MHz | 18/47 MHz |
| FLEX10K-4 | 31/38 MHz | 32/57 MHz |
The gray module was based on techniques discussed in Altera Application Brief 135 available from the Altera web site: http://www.altera.com/document/ab/ab135_01.pdf
| PARAMETERS | |
| LPM_WIDTH | Number of bits in counter output. |
| INPUT PORTS | |
| clock | System clock input. |
| cnt_en | The counter counts on the positive edge of clock whenever cnt_en is logic high. |
| aclr | Asynchronous clear. Resets count sequence to zero when high. |
| OUTPUT PORTS | |
| q[] | Output gray count value of LPM_WIDTH bits. |
Last updated 08 Feb 2001 11:53